memory barrier: graphics read -> host write

src/main.zig

@@ -135,6 +135,30 @@ const Frame = struct {
 
         cmd.endRendering();
 
+        // vulkan implicitly ensures the host writes all data before the host reads it
+        // be sure the shader reads all the vertex data before the host might modify it
+        cmd.pipelineBarrier(
+            .{ .all_graphics_bit = true },
+            .{ .host_bit = true },
+            .{},
+            0,
+            null,
+            1,
+            &.{
+                vk.BufferMemoryBarrier{
+                    .buffer = vertex_buffer,
+                    .src_access_mask = .{ .shader_read_bit = true },
+                    .dst_access_mask = .{ .host_write_bit = true },
+                    .offset = 0,
+                    .size = vk.WHOLE_SIZE,
+                    .src_queue_family_index = 0,
+                    .dst_queue_family_index = 0,
+                },
+            },
+            0,
+            null,
+        );
+
         cmd.pipelineBarrier(
             .{ .color_attachment_output_bit = true },
             .{ .bottom_of_pipe_bit = true },