me/qmk_firmware
1
0
Fork 0
forked from mirror/qmk_firmware
Code Pull Requests Activity

Clean up excessive whitespace at the end of each line using the wspurify tool made by Laszlo Monda

Browse Source
This commit is contained in:
Dean Camera
2010-10-13 14:05:35 +00:00
parent a8871c7fba
commit 5a4def7478
760 changed files with 12883 additions and 12164 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
View File

@@ -1,7 +1,7 @@
/*
LUFA Library
Copyright (C) Dean Camera, 2010.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
@@ -9,13 +9,13 @@
/*
Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, distribute, and sell this
Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
without fee, provided that the above copyright notice appear in
without fee, provided that the above copyright notice appear in
all copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
@@ -49,11 +49,11 @@ void XPROGTarget_EnableTargetPDI(void)
/* Set Tx and XCK as outputs, Rx as input */
DDRD |= (1 << 5) | (1 << 3);
DDRD &= ~(1 << 2);
/* Set DATA line high for at least 90ns to disable /RESET functionality */
PORTD |= (1 << 3);
_delay_us(1);
/* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
UCSR1B = (1 << TXEN1);
@@ -77,7 +77,7 @@ void XPROGTarget_EnableTargetTPI(void)
/* Set Tx and XCK as outputs, Rx as input */
DDRD |= (1 << 5) | (1 << 3);
DDRD &= ~(1 << 2);
/* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
UCSR1B = (1 << TXEN1);
@@ -133,7 +133,7 @@ void XPROGTarget_SendByte(const uint8_t Byte)
/* Switch to Tx mode if currently in Rx mode */
if (!(IsSending))
XPROGTarget_SetTxMode();
/* Wait until there is space in the hardware Tx buffer before writing */
while (!(UCSR1A & (1 << UDRE1)));
UCSR1A |= (1 << TXC1);
@@ -202,3 +202,4 @@ static void XPROGTarget_SetRxMode(void)
}
#endif