forked from mirror/qmk_firmware
remove checksum check, add parity check
This commit is contained in:
@@ -17,6 +17,7 @@
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#ifdef USE_SERIAL
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#ifdef USE_SERIAL
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#define ALWAYS_INLINE __attribute__((always_inline))
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#define ALWAYS_INLINE __attribute__((always_inline))
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#define NO_INLINE __attribute__((noinline))
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#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
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#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
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// Serial pulse period in microseconds.
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// Serial pulse period in microseconds.
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@@ -24,28 +25,28 @@
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#if SELECT_SERIAL_SPEED == 0
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#if SELECT_SERIAL_SPEED == 0
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// Very High speed
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// Very High speed
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#define SERIAL_DELAY 4 // micro sec
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#define SERIAL_DELAY 4 // micro sec
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#define READ_WRITE_START_ADJUST 5 // cycles
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#define READ_WRITE_START_ADJUST 33 // cycles
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#define READ_WRITE_WIDTH_ADJUST 2 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 1
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#elif SELECT_SERIAL_SPEED == 1
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// High speed
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// High speed
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#define SERIAL_DELAY 6 // micro sec
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#define SERIAL_DELAY 6 // micro sec
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#define READ_WRITE_START_ADJUST 5 // cycles
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 2 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 2
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#elif SELECT_SERIAL_SPEED == 2
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// Middle speed
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// Middle speed
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#define SERIAL_DELAY 12 // micro sec
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#define SERIAL_DELAY 12 // micro sec
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#define READ_WRITE_START_ADJUST 5 // cycles
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 2 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 3
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#elif SELECT_SERIAL_SPEED == 3
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// Low speed
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// Low speed
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#define SERIAL_DELAY 24 // micro sec
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#define SERIAL_DELAY 24 // micro sec
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#define READ_WRITE_START_ADJUST 5 // cycles
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 2 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#elif SELECT_SERIAL_SPEED == 4
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#elif SELECT_SERIAL_SPEED == 4
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// Very Low speed
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// Very Low speed
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#define SERIAL_DELAY 50 // micro sec
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#define SERIAL_DELAY 50 // micro sec
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#define READ_WRITE_START_ADJUST 5 // cycles
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#define READ_WRITE_START_ADJUST 30 // cycles
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#define READ_WRITE_WIDTH_ADJUST 2 // cycles
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#define READ_WRITE_WIDTH_ADJUST 3 // cycles
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#else
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#else
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#error Illegal Serial Speed
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#error Illegal Serial Speed
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#endif
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#endif
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@@ -160,77 +161,92 @@ void sync_send(void) {
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}
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}
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// Reads a byte from the serial line
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// Reads a byte from the serial line
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static
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static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
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uint8_t serial_read_byte(void) {
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static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
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uint8_t byte = 0;
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uint8_t byte, i, p, pb;
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_delay_sub_us(READ_WRITE_START_ADJUST);
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_delay_sub_us(READ_WRITE_START_ADJUST);
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for ( uint8_t i = 0; i < 8; ++i) {
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for( i = 0, byte = 0, p = 0; i < bit; i++ ) {
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serial_delay_half1(); // read the middle of pulses
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serial_delay_half1(); // read the middle of pulses
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debug_recvsample();
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debug_recvsample();
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byte = (byte << 1) | serial_read_pin();
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if( serial_read_pin() ) {
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debug_recvsample();
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byte = (byte << 1) | 1; p ^= 1;
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_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
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} else {
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serial_delay_half2();
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byte = (byte << 1) | 0; p ^= 0;
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debug_dummy_delay_recv();
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}
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debug_recvsample();
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_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
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serial_delay_half2();
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debug_dummy_delay_recv();
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}
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}
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/* recive parity bit */
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serial_delay_half1(); // read the middle of pulses
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debug_recvsample();
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pb = serial_read_pin();
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debug_recvsample();
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_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
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serial_delay_half2();
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debug_dummy_delay_recv();
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if( p == pb ) debug_parity_on();
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*pterrcount += (p != pb)? 1 : 0;
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debug_parity_off();
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return byte;
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return byte;
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}
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}
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// Sends a byte with MSB ordering
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// Sends a byte with MSB ordering
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static
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void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
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void serial_write_byte(uint8_t data) {
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void serial_write_chunk(uint8_t data, uint8_t bit) {
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uint8_t b = 1<<7;
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uint8_t b, p;
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while( b ) {
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for( p = 0, b = 1<<(bit-1); b ; b >>= 1) {
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if(data & b) {
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if(data & b) {
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serial_high();
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serial_high(); p ^= 1;
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} else {
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} else {
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serial_low();
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serial_low(); p ^= 0;
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}
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debug_recvsample();
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serial_delay();
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debug_recvsample();
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debug_dummy_delay_send();
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}
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}
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b >>= 1;
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/* send parity bit */
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if(p & 1) { serial_high(); }
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else { serial_low(); }
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debug_recvsample();
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debug_recvsample();
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serial_delay();
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serial_delay();
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debug_recvsample();
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debug_recvsample();
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debug_dummy_delay_send();
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debug_dummy_delay_send();
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}
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serial_low(); // sync_send() / senc_recv() need raise edge
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serial_low(); // sync_send() / senc_recv() need raise edge
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}
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}
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static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
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static
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static
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void serial_send_packet(uint8_t *buffer, uint8_t size) {
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void serial_send_packet(uint8_t *buffer, uint8_t size) {
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uint8_t checksum = 0;
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for (uint8_t i = 0; i < size; ++i) {
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for (uint8_t i = 0; i < size; ++i) {
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uint8_t data;
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uint8_t data;
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data = buffer[i];
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data = buffer[i];
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sync_send();
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sync_send();
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debug_bytewidth_start();
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debug_bytewidth_start();
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serial_write_byte(data);
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serial_write_chunk(data,8);
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debug_bytewidth_end();
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debug_bytewidth_end();
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checksum += data;
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}
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}
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sync_send();
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debug_bytewidth_start();
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serial_write_byte(checksum);
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debug_bytewidth_end();
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}
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}
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static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
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static
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static
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uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
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uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
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uint8_t checksum_computed = 0;
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uint8_t pecount = 0;
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for (uint8_t i = 0; i < size; ++i) {
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for (uint8_t i = 0; i < size; ++i) {
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uint8_t data;
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uint8_t data;
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sync_recv();
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sync_recv();
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debug_bytewidth_start();
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debug_bytewidth_start();
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data = serial_read_byte();
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data = serial_read_chunk(&pecount, 8);
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debug_bytewidth_end();
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debug_bytewidth_end();
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buffer[i] = data;
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buffer[i] = data;
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checksum_computed += data;
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}
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}
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sync_recv();
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return pecount == 0;
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debug_bytewidth_start();
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uint8_t checksum_received = serial_read_byte();
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debug_bytewidth_end();
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return checksum_computed == checksum_received;
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}
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}
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inline static
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inline static
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