forked from mirror/qmk_firmware
add split_scomm.c/split_scomm.h and change serial.c/serial.h
serial.c was divided into 2 layers, split_scom.c and serial.c. The upper layer split_scomm.c is called from matrix.c. The lower layer serial.c accesses the hardware.
This commit is contained in:
@@ -34,7 +34,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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#ifdef USE_MATRIX_I2C
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# include "i2c.h"
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#else // USE_SERIAL
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# include "serial.h"
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# include "split_scomm.h"
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#endif
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#ifndef DEBOUNCE
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@@ -182,7 +182,7 @@ i2c_error: // the cable is disconnceted, or something else went wrong
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int serial_transaction(void) {
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int slaveOffset = (isLeftHand) ? (ROWS_PER_HAND) : 0;
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int ret=serial_update_buffers();
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int ret=serial_update_buffers(1);
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if (ret ) {
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if(ret==2)RXLED1;
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return 1;
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@@ -1,3 +1,4 @@
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SRC += rev2/matrix.c \
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rev2/split_util.c \
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ws2812.c
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SRC += rev2/matrix.c
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SRC += rev2/split_util.c
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SRC += rev2/split_scomm.c
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SRC += ws2812.c
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@@ -8,9 +8,6 @@
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#define SERIAL_PIN_MASK _BV(PD2)
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#define SERIAL_PIN_INTERRUPT INT2_vect
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#define SERIAL_SLAVE_BUFFER_LENGTH MATRIX_ROWS/2
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#define SERIAL_MASTER_BUFFER_LENGTH MATRIX_ROWS/2
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//// #error rev2 serial config
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#endif /* SOFT_SERIAL_CONFIG_H */
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36
keyboards/helix/rev2/split_scomm.c
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36
keyboards/helix/rev2/split_scomm.c
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@@ -0,0 +1,36 @@
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#ifdef USE_SERIAL
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#include <stdbool.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <split_scomm.h>
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#include "serial.h"
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uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
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uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0};
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uint8_t volatile status0 = 0;
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SSTD_t transactions[] = {
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{ (uint8_t *)&status0,
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sizeof(serial_master_buffer), (uint8_t *)serial_master_buffer,
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sizeof(serial_slave_buffer), (uint8_t *)serial_slave_buffer
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}
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};
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void serial_master_init(void)
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{
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soft_serial_initiator_init(transactions);
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}
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void serial_slave_init(void)
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{
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soft_serial_target_init(transactions);
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}
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// 0 => no error
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// 1 => slave did not respond
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// 2 => checksum error
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int serial_update_buffers(int master_update)
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{
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return soft_serial_transaction(0);
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}
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#endif /* USE_SERIAL */
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15
keyboards/helix/rev2/split_scomm.h
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15
keyboards/helix/rev2/split_scomm.h
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@@ -0,0 +1,15 @@
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#ifndef SPLIT_COMM_H
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#define SPLIT_COMM_H
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// Buffers for master - slave communication
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#define SERIAL_SLAVE_BUFFER_LENGTH MATRIX_ROWS/2
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#define SERIAL_MASTER_BUFFER_LENGTH MATRIX_ROWS/2
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extern volatile uint8_t serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH];
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extern volatile uint8_t serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH];
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void serial_master_init(void);
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void serial_slave_init(void);
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int serial_update_buffers(int master_changed);
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#endif /* SPLIT_COMM_H */
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@@ -11,7 +11,7 @@
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#ifdef USE_MATRIX_I2C
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# include "i2c.h"
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#else
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# include "serial.h"
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# include "split_scomm.h"
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#endif
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volatile bool isLeftHand = true;
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@@ -1,6 +1,9 @@
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SRC += i2c.c \
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serial.c \
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ssd1306.c
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SRC += i2c.c
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SRC += serial.c
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SRC += ssd1306.c
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# if firmware size over limit, try this option
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# CFLAGS += -flto
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# MCU name
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#MCU = at90usb1287
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@@ -9,8 +9,10 @@
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/delay.h>
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#include <stddef.h>
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#include <stdbool.h>
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#include "serial.h"
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//#include <pro_micro.h>
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#ifdef USE_SERIAL
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@@ -55,11 +57,7 @@
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#define SLAVE_INT_WIDTH 1
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#define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
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uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
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uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0};
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#define SLAVE_DATA_CORRUPT (1<<0)
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volatile uint8_t status = 0;
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static SSTD_t *Transaction_table = NULL;
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inline static
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void serial_delay(void) {
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@@ -109,26 +107,30 @@ void serial_high(void) {
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SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
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}
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void serial_master_init(void) {
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serial_debug_init();
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serial_output();
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serial_high();
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void soft_serial_initiator_init(SSTD_t *sstd_table)
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{
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serial_debug_init();
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Transaction_table = sstd_table;
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serial_output();
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serial_high();
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}
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void serial_slave_init(void) {
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serial_debug_init();
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serial_input_with_pullup();
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void soft_serial_target_init(SSTD_t *sstd_table)
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{
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serial_debug_init();
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Transaction_table = sstd_table;
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serial_input_with_pullup();
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#if SERIAL_PIN_MASK == _BV(PD0)
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// Enable INT0
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EIMSK |= _BV(INT0);
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// Trigger on falling edge of INT0
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EICRA &= ~(_BV(ISC00) | _BV(ISC01));
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// Enable INT0
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EIMSK |= _BV(INT0);
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// Trigger on falling edge of INT0
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EICRA &= ~(_BV(ISC00) | _BV(ISC01));
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#elif SERIAL_PIN_MASK == _BV(PD2)
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// Enable INT2
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EIMSK |= _BV(INT2);
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// Trigger on falling edge of INT2
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EICRA &= ~(_BV(ISC20) | _BV(ISC21));
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// Enable INT2
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EIMSK |= _BV(INT2);
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// Trigger on falling edge of INT2
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EICRA &= ~(_BV(ISC20) | _BV(ISC21));
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#else
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#error unknown SERIAL_PIN_MASK value
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#endif
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@@ -228,7 +230,7 @@ uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
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uint8_t checksum_received = serial_read_byte();
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debug_bytewidth_end();
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return checksum_computed != checksum_received;
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return checksum_computed == checksum_received;
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}
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inline static
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@@ -255,38 +257,38 @@ ISR(SERIAL_PIN_INTERRUPT) {
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serial_low();
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serial_output();
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SSTD_t *trans = Transaction_table;
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// slave send phase
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serial_send_packet((uint8_t *)serial_slave_buffer, SERIAL_SLAVE_BUFFER_LENGTH);
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serial_send_packet((uint8_t *)trans->target2initiator_buffer,
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trans->target2initiator_buffer_size);
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// slave switch to input
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change_sender2reciver();
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// slave recive phase
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if (serial_recive_packet((uint8_t *)serial_master_buffer,SERIAL_MASTER_BUFFER_LENGTH) ) {
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status |= SLAVE_DATA_CORRUPT;
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if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
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trans->initiator2target_buffer_size) ) {
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*trans->status = RECIVE_ACCEPTED;
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} else {
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status &= ~SLAVE_DATA_CORRUPT;
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*trans->status = RECIVE_DATA_ERROR;
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}
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sync_recv(); //weit master output to high
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debug_output_mode(); debug_input_mode(); // indicate intterupt exit
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}
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inline
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bool serial_slave_DATA_CORRUPT(void) {
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return status & SLAVE_DATA_CORRUPT;
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}
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// Copies the serial_slave_buffer to the master and sends the
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// serial_master_buffer to the slave.
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/////////
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// start transaction by initiator
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//
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// int soft_serial_transaction(int sstd_index)
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//
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// Returns:
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// 0 => no error
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// 1 => slave did not respond
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// 2 => checksum error
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int serial_update_buffers(void) {
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// TRANSACTION_END
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// TRANSACTION_NO_RESPONSE
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// TRANSACTION_DATA_ERROR
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int soft_serial_transaction(int sstd_index) {
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// this code is very time dependent, so we need to disable interrupts
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SSTD_t *trans = &Transaction_table[sstd_index];
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cli();
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// signal to the slave that we want to start a transaction
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@@ -309,7 +311,8 @@ int serial_update_buffers(void) {
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// master recive phase
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// if the slave is present syncronize with it
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if (serial_recive_packet((uint8_t *)serial_slave_buffer, SERIAL_SLAVE_BUFFER_LENGTH) ) {
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if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
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trans->target2initiator_buffer_size) ) {
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serial_output();
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serial_high();
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sei();
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@@ -320,7 +323,8 @@ int serial_update_buffers(void) {
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change_reciver2sender();
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// master send phase
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serial_send_packet((uint8_t *)serial_master_buffer, SERIAL_MASTER_BUFFER_LENGTH);
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serial_send_packet((uint8_t *)trans->initiator2target_buffer,
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trans->initiator2target_buffer_size);
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// always, release the line when not in use
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sync_send();
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@@ -12,18 +12,31 @@
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// #define SERIAL_PIN_INPUT PIND
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// #define SERIAL_PIN_MASK _BV(PD?) ?=0,2
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// #define SERIAL_PIN_INTERRUPT INT?_vect ?=0,2
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// #define SERIAL_SLAVE_BUFFER_LENGTH MATRIX_ROWS/2
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// #define SERIAL_MASTER_BUFFER_LENGTH MATRIX_ROWS/2
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// Buffers for master - slave communication
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extern volatile uint8_t serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH];
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extern volatile uint8_t serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH];
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// Soft Serial Transaction Descriptor
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typedef struct _SSTD_t {
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uint8_t *status;
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uint8_t initiator2target_buffer_size;
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uint8_t *initiator2target_buffer;
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uint8_t target2initiator_buffer_size;
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uint8_t *target2initiator_buffer;
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} SSTD_t;
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void serial_master_init(void);
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void serial_slave_init(void);
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int serial_update_buffers(void);
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bool serial_slave_data_corrupt(void);
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// initiator is transaction start side
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void soft_serial_initiator_init(SSTD_t *sstd_table);
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// target is interrupt accept side
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void soft_serial_target_init(SSTD_t *sstd_table);
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// initiator resullt
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#define TRANSACTION_END 0
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#define TRANSACTION_NO_RESPONSE 1
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#define TRANSACTION_DATA_ERROR 2
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int soft_serial_transaction(int sstd_index);
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// target status
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#define RECIVE_ACCEPTED 1
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#define RECIVE_DATA_ERROR 2
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int soft_serial_get_and_clean_target_status(int sstd_index);
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